Increasing performance and reducing cost, while maintaining safety levels and programmability are the key demands for embedded and cyber-physical systems in European domains, e.g. aerospace, automation, and automotive. For many applications, the necessary performance with low energy consumption can only be provided by customized computing platforms based on heterogeneous many-core architectures. However, their parallel programming with time-critical embedded applications suffers from a complex toolchain and programming process.
The ARGO (WCET-Aware Parallelization of Model-Based Applications for Heterogeneous Parallel Systems) research project will address this challenge with a holistic approach for programming heterogeneous multi- and many-core architectures using automatic parallelization of model-based real-time applications. ARGO will enhance WCET-aware automatic parallelization by a cross-layer programming approach combining automatic tool-based and user-guided parallelization to reduce the need for expertise in programming parallel heterogeneous architectures. The ARGO approach will be assessed and demonstrated by prototyping comprehensive time-critical applications from both aerospace and industrial automation domains on customized heterogeneous many-core platforms.
The challenging research and innovation action will be achieved by the unique ARGO consortium that brings together industry, leading research institutes and universities. High class SMEs such as Recore Systems, Scilab Enterprises and AbsInt will contribute their diverse know-how in heterogeneous many-core technologies, model-based design environments and WCET calculation. The academic partners will contribute their outstanding expertise in code transformations, automatic parallelization and system-level WCET analysis.
The ARGO tool-chain will translate model-based Scilab/Xcos applications into multi-core optimized C code with guaranteed real-time constraints. This shall be achieved by developing WCET aware automatic parallelization algorithms and a WCET analysis tool for heterogeneous multi-core architectures and parallel programs. Furthermore ARGO aims to provide a cross-layer programming interface, which allows end users to interactively control the automated parallelization process as detailed as needed.
The following figure shows an overview of the planned tool-flow:
More details can be found on the ARGO HiPEAC 2016 Poster.